The following C function is compiled with hard floating point linkage.
float function(int a, float b, int c, float d);
Which register is used to pass argument c?
During an investigation into a software performance problem an engineer doubles the clock frequency of a cached ARM processor running the software. Unfortunately the performance of the application does not increase by very much, despite running on the processor for 100% of the time. What is likely to be the main bottleneck in the system?
When applied to locations in memory configured using a write-back cache strategy, what does a data cache 'clean' operation do?
A Just-In-Time compiler writes instructions to a region of memory that is configured using a writeback cache strategy. For the locations that have been written, what is the MINIMUM cache maintenance that MUST be performed before the new instructions can be reliably executed?
Consider the following code sequence, executing on a processor which implements ARM Architecture v7-A.
LDR r0, [r1]
STR r0, [r2]
STR r3, [r3]
R1 points to a location in normal memory. R2 and R3 point to device memory.
Which of the following statements best describes the ordering rules which apply to this sequence?
The purpose of a translation lookaside buffer (TLB) is to:
A message passing system between two CPUs is implemented using data stored in a shared area of memory. To pass a message, the first CPU executes the instructions:
The second CPU receives the message using the instructions:
On both CPUs, r1 = 0x5000 and r2 = 0x6000. At which of the points A, B, C and D must Data Memory Barrier (DMB) instructions be placed in order to ensure messages are passed reliably and efficiently?
Using a lower optimization level when compiling will:
In Architecture ARMv7-A which one of the following has a known physical address at power-on reset?
As part of the ABI specification, the AAPCS defines which of the following?
Which of the following would enable the use of a symmetric multiprocessing (SMP) operating system?
If a Generic Interrupt Controller (GIC) implements 64 priority levels, which priority field bits hold the priority value?
When using the ARM Compiler (armcc), which of the following possible keywords can be used to remove padding bytes from a structure?
Which of the following instructions can be used to enter a power saving mode?
What view in a debugger displays the order in which functions were called?
Which of the following is TRUE for dynamically linked executables?
In an ARMv7-A system, the following C function calculates a simple checksum for an input data packet of variable length. The checksum is defined to be the sum of all of the 16-bit data items in the packet modulo 65536. The parameter data_items contains the number of 2-byte data items in the packet, and it cannot be zero by design.
When using an ARM compiler, which TWO of the following optimizations could improve the performance of this code? (Choose two)
In the Generic Interrupt Controller (GIC) architecture, which of the following ID numbers are reserved for interrupts that are private to a CPU interface?
Which one of the following statements is TRUE for software breakpoints?
A function written in C has the prototype:
void my_function(float a. double b, float c);
The function is built and linked into an application using hard floating-point linkage. What registers are used to pass arguments to the function?
An Advanced SIMD intrinsic has the prototype:
int16x4_t vmul_n_s16(int16x4_t a, int16_t b);
How many multiplications does this intrinsic compute?
Which ARMv7 instructions are recommended to implement a semaphore?
In the VFPv4-D32 architecture, which of the following best describes the arrangement of the registers?
When using the Performance Monitoring Unit to count runtime events the counter registers are limited to 32-bits. How can more than 2A32 events be counted without significantly impacting the software performance?
Which THREE of the following items should be preserved by software when entering dormant mode? (Choose three)
Which of the following ARM processors has the best energy efficiency (measured in mW/MHz)?
Which of the following techniques can be used to obtain a precise count of clock cycles when profiling software over an arbitrarily long period of time using the Performance Monitoring Unit?
According to the EABI. what would the C size of () operator return when given the following structure?
In the Generic Interrupt Controller (GIC), when an interrupt is requested, but is not yet being handled, it is in which of the following states?
In which of the following scenarios would cache maintenance operations be necessary in an ARMv7 system?
Which of these C99 keywords can be used to indicate that two arrays do not overlap?